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Q 2 . [ 7 0 points ] For the following assume that values A , B , C , D , E , and
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For the following assume that values A B C D E and F reside in memory. Also assume that
instruction operation codes are represented in bits, memory addresses are bits, data size is
bits and register addresses are bits.
a For each instruction set architecture shown in Figure A how many addresses, or
names including both memory and register appear in each instruction for the code to
compute and what is the total code size?
b Some of the instruction set architectures in Figure A destroy operands in the course
of computation. This loss of data values from processor internal storage has
performance consequences. For each architecture in Figure A write the code
sequence to compute:
In your code, mark each operand that is destroyed during execution and mark each
"overhead" instruction that is included just to overcome this loss of data from processor
internal storage. What is the total code size, the number of bytes of instructions and data
moved to or from memory, the number of overhead instructions, and the number of
overhead data bytes for each of your code sequences?
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