Q2. (CLO4/PLO2) Consider the circuit given below. Determine the critical path for the circuit and calculate the total delay for the critical path. The timing parameters and propagation delay for different. circuit elements are given in the table below. If we want to run the circuit on clock with period of 370 ns, will there be any setup time violation on the critical path? Assume i) clock skew of 0ns and ii) clock skew of 20ns. (6)