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Question 1 Accumulator Architecture In the following, we consider a hypothetical machine with an 8 - bit accumulator ( AC ) as register for computations,

Question 1 Accumulator Architecture
In the following, we consider a hypothetical machine with an 8-bit accumulator (AC) as register
for computations, an 8-bit nrrurram muntor (PC) and an &.hit instruction register (IR):
Each machine instruction consists of one byte. The operation code is contained in the three
most significant bits of a machine instruction. The other five bits contain the specification of an
operand. This is always a memory address.
The following bytes are now stored in memory:
i) Write the content of the memory mnemonically/symbolically in the left table.
ii) Simulate the execution of the machine program in the right table. Document in each row
the state of one machine instruction cycle as follows: The "cycle" column denotes the
current instruction cycle, the "PC" column shows the PC register value at the beginning
of the instruction cycle, while the "IR" and "AC" columns show the IR and AC registers
at the end of the instruction cycle. Write the address and content of a modified memory
byte in the "memory" column, if required.
Note: You can use the symbolic representation for the "IR" column and the decimal
representation for values in the "AC" and "memory" columns.
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