Question 2 and 3 please,

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2. For the next two subproblems, we will perform register allocation using bottom-up register allocation as presented in the notes. READ(X) defines the value of X (i.e it assigns to X). WRITE(X) reads the value of X to write it out to the screen. Show what code would be generated for each 3AC instruction. Use LOAD X Rx to load from a variable/temporary into a register, STORE Rx X to store from a register into a variable/temporary, Rx = Ry + Rz for addition, and Rx = Ry * Rz for multiplication When choosing registers to allocate, always allocate the lowest-numbered register available. When choosing registers to spill, choose the non-dirty register that will be used farthest in the future. In case all registers are dirty, choose the register that will be used farthest in the future. In case of a tie, choose the lowest-numbered register. If a load or store is the result of a spill (kicking a value out of a register earlier than required, or loading one of those values back into the register), indicate that . Perform register allocation for a machine with 4 registers. . Perform register allocation for a machine with 3 registers. 3. Assume you have a machine with 2 ALUs (ALU0 and ALU1) and one LD/ST unit Your instruction set consists of 5 instructions: ADD, MUL, LOAD and STORE. An ADD instruction can be performed on either ALU, and takes one cycle. A MUL instruction can be performed on ALUO or ALU1, and takes two cycles. A LOAD takes up either of the ALUs for one cycle, then the LD/ST unit for two cycles. A STORE takes up either of the ALUs for one cycle, then the LD/ST unit for one cycle. All of the functional units are fully pipelined. Draw the reservation tables for the instructions