Referring to Figure 2, assume that the address on the address bus is 0x3AFF.

1. Which RAM chip (if any) would be activated?

2. What address in the activated chip would be read or written?

2. The following questions refer to the Figure 2 below: CPU Data Bus (8 bits) Address Bus (16 bits) A0-A13 AO-A13 DO-07 DO-D7 AO- RAM 1 A13 AO RAM 2 A13 cs w 18 w RW 74LS139 A14 A15 B lolle E to other RAMS, ROMs, etc. Figure 2: Memory Selection Schematic