Registers that are visible to the software are often referred to the architecture registers. Various processors have different number of architecture registers. The purpose of this exercise is to assess the impact of having various number of registers on the code complexity. Suppose that the code sequence is to compute A=B-C, B=A+C, D=A+B, E=C-D.

Assume that all of A, B, C, D, and E are initially in memory. List the sequence of instructions for Register (load-store) ISA, and compare the number of loads and stores that you need in order to do the computation when there are only 2 architecture registers vs. when there are 3 architecture registers.