Sequential Logic 28. In an active high S-R latch, what happens if both S and R are high? O A. holds its value. OB. Q is 'set' to 1. O C. Q is reset' to 0. O D. This is an invalid combination. 29. What device does this timing diagram represent: Look like clock Z T A. D flip flop, edge triggered B. Dlatch, level triggered . DR latch- OD. S-R latch, active high O E. S-R latch, active low Pall to of that cik noen Arithmetic and Logic Operations 30. What is the result of a bit-wise AND of the decimal numbers 11 and 7? O A. 3 O B. 2 O C. 15 OD. 7 31. Assume a signed integer x=0x4B. What are the results of x > 4 (shift right by 4) for arithmetic shift? O A. OxBF and OxF4 OB. OxBO and Ox00 O C. Ox00 and Ox00 OD. 0x40 and Ox04 OE. OxBO and Ox04. 32. The result of the bit-wise AND operation between 0xCAFE and OxBABE is: O A. 10111110111011112 O B. 10111010101110012 C. 10001010101111102 OD. 11111110111011012 O E. 10011010111100102 33. Which of these 8-bit two's complement computations have overflow but no carry-out? Assume answers are expressed in binary. Select all that apply. O A. 1111 1111 +0000 0001 OB. 1000 0000 + 1000 0001 OC. 0111 1111 +0000 0001 O D. 0111 1111 + 0111 1111 E. 1000 0000 + 0000 0001 34. What is the result of a bit-wise XOR performed on the following binary numbers? 011001 110111 O A. 0100012 OB. 1011102 OC. 0100002 OD. 1111112