Suppose that the function unit times are given as follows: (1 ns = 10^-9seconds) 2 ns for memory access, 1 ns for ALU operation, and 0.5 ns for register file read or write. According to our design, what is the desirable clock rate for the single-cycle machine and the pipelined machine, respectively? What is the execution time for running the following codes on the single-cycle and the pipelined machine, respectively? Suppose that the function unit times are given as follows: (1 ns = 10^-9seconds) 2 ns for memory access, 1 ns for ALU operation, and 0.5 ns for register file read or write. According to our design, what is the desirable clock rate for the single-cycle machine and the pipelined machine, respectively? What is the execution time for running the following codes on the single-cycle and the pipelined machine, respectively