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Suppose we have a system with a virtual memory space of 1 Gbytes and a physical memory space of 2 5 6 Mbytes for paging.

Suppose we have a system with a virtual memory space of 1Gbytes and a physical memory space of 256Mbytes for paging.
a.(2 points) If the page size is 4Kbytes, how many pages are available for caching? Provide both virtual and physical amounts.
b.(2 points) How many entries are in the page table for a process?
c.(2 points) How many bits of the virtual address are in the virtual page offset?
d.(2 points) How many bits are in the physical page number?
e.(2 points) What is a translation lookaside buffer (TLB)? How does it speed up translations of virtual addresses to physical addresses?

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