Suppose you have a processor with a base CPI of 1.0, and two caches (L1 and L2). You have the following specifications Clock rate= 8 GHz. Access time to L2 Cache = 6 ns Access time to Main memory = 100 ns Miss rate per instruction at the L1 cache is 2.5%. Miss rate per instruction at the L2 cache is 0.7% A program contains 3000 instructions, 600 of them are memory access instructions. Taking into consideration the stalls on Data cache only find the total average CPI . None of them b 2.33 1.21 d 1 26 1.14