Synthesize the given SystemVerilog and .xdc files, and program the Nexys4DDR board with the resulting .bit file. Study the code and verify it operates as expected (note there is code inside of disp_mux8.v which hasnt been covered yet in this course, so dont try to understand it yet; just treat it as if the inputs to this module directly drive the LEDs).\ Complete the functional specification in the table below by filling in the blank cells in the digit0 column.\ Modify alu.sv as needed to meet the completed specification, using a case statement. Files disp_mux8.sv, hex_to_ssegM.sv, fpga_top_Lab4.sv, and Nexys4DDR_Lab4.xdc do not need to be modified. Verify every opcode works as you would expect (but even with only a 4-bit ALU, your testing combinations will have to be very limited). Then demonstrate the following cases to the professor or lab assistant:\ Set all switches low. Explain your observation of aGTb and fEq0.\ Change to a = 4b0001. Explain your observation of aGTb and fEq0.\ Set a = 4b1000, b = 4b0111, Cin = 1, and opcode = 4b0000 (add). Explain your observation of f[7:0] and Cout.\ Change opcode to 4b0001 (addc). Explain the change to f[7:0] and Cout.\ Set all switches high. Explain your observation of f[3:0] and Cout.\ Functional specification:\ This design could be used as a simple 4-bit Arithmetic Logic Unit (ALU) within a CPU. The operations are addition and subtraction with and without carry in; multiplication; bit operations of and, or, inv, xor, and mask; rotate left and right either without carry or through carry; and shift left and right. Four switches control the 4 bit operation, determining which of the 16 functions are implemented in the combinational logic. Nine other slide switches are used to set a Carry-in bit and two four bit operands. The function output is on two of the eight 7-segment displays, and three of the decimal points are used to display a Carry-out bit, a bit that indicates the function result is zero, and a bit that compares the magnitude of the two operands.\ \ For the below table,\ \ a = SW[15:12], b = SW[11:8], Cin = SW[7], opcode = SW[3:0]; Switch up = 1, switch down = 0.\ f = a + b + Cin is a 5-bit sum displayed as two hexadecimal digits from 00 to 1F.\ For multiplication and comparison, treat a, b, and f as unsigned integers.\ f = a * b is an 8-bit product displayed as two hexadecimal digits from 00 to E1.\ Complete and implement the missing rows for Digit0.\ Digit7dp, Digit5, Digit5dp, Digit4dp, Digit3, Digit2, and Digit1dp should be off.\ Operation\ \ Seven-segment display (DigitX) and Digit decimal point (DigitXdp) outputs\ displayed characters represent hexadecimal digits\ \ name opcode\ \ Digit7\ a Digit6\ b Digit6dp\ Cin Digit4\ opcode Digit3dp\ aGTb Digit2dp fEq0 Digit1\ f[7:4] Digit0\ f[3:0] Digit0dp Cout\ add 0 a b Cin opcode a>b f==0 f = a + b f[4]\ addc 1 a b Cin opcode a>b f==0 f = a + b + Cin f[4]\ sub 2 a b Cin opcode a>b f==0 f = a - b f[4]\ subc 3 a b Cin opcode a>b f==0 f = a - b - Cin f[4]\ mult 4 a b Cin opcode a>b f==0 f = a * b Cin\ and 5 a b Cin opcode a>b f==0 4h0 f = a & b Cin\ or 6 a b Cin opcode a>b f==0 4h0 Cin\ inv 7 a b Cin opcode a>b f==0 4h0 f = ~a Cin\ xor 8 a b Cin opcode a>b f==0 4h0 Cin\ mask 9 a b Cin opcode a>b f==0 4h0 f = a & ~b Cin\ rol A a b Cin opcode a>b f==0 4h0 {a[2:0],a[3]} Cin\ ror B a b Cin opcode a>b f==0 4h0 Cin\ rlc C a b Cin opcode a>b f==0 4h0 {a[2:0],Cin} a[3]\ rrc D a b Cin opcode a>b f==0 4h0 a[0]\ shl E a b Cin opcode a>b f==0 4h0 {a[2:0],1b0} a[3]\ shr F a b Cin opcode a>b f==0 4h0 a[0]\ ALU input displays ALU output displays