The diagram here shows the pull$-$up network for a logical gate. What is the logical function that would be implemented by the full CMOS circuit?

$A.Y\frac{?}{b}=ar(B.A.D.C)$

B$.Y\frac{?}{b}=ar((B+C)*D+A)$

$C.Y=B+C+D+A$

$D.Y=A*C+D*B$