The figure below shows the input D to a latch, along with the clock control input, clk (which is connected to the G input in the figure shown on the slide). Assume that the output, Q, is initially 0. Fill in the blanks below, indicating the output, Q, at time instants 1, 2, and 3. Assume it is A. a positive latch B. A negative latch C. A flip-flop latch and indicate the correct Q value for each.

3 Dk 2 3 Dk 2