The mantissa adder-subtractor in Figure 9.28 operates on positive, unsigned binary fractions and must produce a sign-and-magnitude result. In the discussion accompanying Figure 9.28, we state that 1s-complement arithmetic is convenient because of the required formatforinputandoutputoperands. Whenaddingtwosignednumbersin1s-complement notation,thecarry-outfromthesignpositionmustbeaddedtotheresulttoobtainthecorrect signed answer. This is called end-around carry correction. Consider the two examples in FigureP9.3,whichillustrateadditionusingsigned,4-bitencodingsofoperandsandanswers in the 1s-complement system. The 1s-complement arithmetic system is convenient when a sign-and-magnitude result is to be generated because a negative number in 1s-complement notation can be converted to sign-and-magnitude form by complementing the bits to the right of the sign-bit position. Using2s-complementarithmetic,additionof+1isneededtoconvertanegativevalueinto sign-and-magnitudenotation. Ifacarry-lookaheadadderisused,itispossibletoincorporate the end-around carry operation required by 1s-complement arithmetic into the lookahead logic. With this discussion as a guide, give the complete design of the 1s-complement adder/subtractor required in Figure 9.28.