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The N-channel transistor (NFET) in the SRAM cell below has LGATE=25nm, W=70nm, gate oxide thickness of 1.2nm, and threshold voltage of 0.2V. The SRAM operates

The N-channel transistor (NFET) in the SRAM cell below has LGATE=25nm, W=70nm, gate oxide thickness of 1.2nm, and threshold voltage of 0.2V. The SRAM operates at 2.0V.

Some equations that may be helpful:

Qn=COX (VG-VT)

J=qn

max = 10^7 cm/s

q =1.6 x 10^-19 C

eo=8.85x10^-14 F/cm

eSi=11.7 x eo

eOX=3.9 x eo

kT/q = 0.026 (at T = 300K)

COX =eOX*eo / TOX

(a) Estimate the maximum current per unit width (mA/um)

(b) Repeat problem 3 but now assume all things identical but channel material has a quantum capatance equal to Cox

(c) What is the number of dopant atoms in the channel assuming the depletion layer width is the same as the gate length. The p-well doping concentration is 10^17 cm^-3 and the n-well doping is 10^18 cm^-3

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