use quartus ii and just need 5and 6 answer...

i just need screenshot or picture

do it on

quartus ii

no need anything

I. Designing an Ordinary Encoder with VHDL Input VHDL I. Designing an Ordinary Encoder with VHDL Input (1) Start a new project: encoder4to2; (2) Create a new text editor file; (3) Complete the encoder4to 2 code and save it; (4) Compiled file encoder4to2; (5) Simulation verification; (6) Pin assignment; T.IHBAHY iene; - iece is. USE icecsad logie 1164 Al. . E.NITTY encoderden2 is w tis phe if. fitit 2 ind FORTV. 33, 22,1,NO0 iv itd_logis: y1, yo + out an logic k Complete the cocle END encodertiot: BEGIN BEGIN END CASE: yleyy(1):-Dy? END FROCESS: Simulation verification Simulation verification Simulation verification Pin assignment Assignments | Pin Planner Pin Planner