Use the last template

5. [12 points] Consider a 5-stage IF, ID, EX, MEM and WB pipeline as specified in Figure 4.46. Assume perfect branch prediction (no stalls due to control hazard)Data forward is used. Draw the pipeline execution diagram for the first 16 clock cycles similar to Homework Question 4.11. Make sure to indicate stalls and show data forwarding from a source stage to a destination stage addi $so, $zero, 12 I2: loop: I3: I4 15 I6 I7: addi $to, $to, 10 SW addi bne slt $to, 0($s0) $s0, $s0,-4 $0, $s0, loop