VHDL programming

a. Consider the following process statement written within the architecture body which is executed. Determine the values of var1, temp and q at different simulation time and complete the following Table-2. Each column represents a new value of a and b at different simulation time and A represents delta delay. Initial value of vari, temp and q is written in column 1. (12 Marks) process (a,b) variable var1: integer; begin var1 := a + b; temp