Question
We would like to establish the performance of a 5 stage Pipelined MIPS datapath using a custom multimedia benchmark with instruction execution frequencies given as
We would like to establish the performance of a 5 stage Pipelined MIPS datapath using a custom multimedia benchmark with instruction execution frequencies given as follows:
Loads: 35%; Stores: 15%; Branch: 20%; Jumps: 5%; ALU Operations: 25%.
a) What is the CPI assuming no hazards occur:
b) Now compute the CPI assuming the following types of hazards occur
- A 2 clock cycle penalty is incurred (one cycle stall) when branches are mispredicted. 25% of branches are miss-predicted.
- Assume 30% of loads are immediately followed by an instruction that uses the result of the load.
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