What is the approximate AMAT $($nsec$)$ for a memory system with the following specifications:

The processor runs at $2$ GHz and the first level cache is accessed at the processor speed.

There are three levels of caching L$1,$ L$2$ and L$3.$

L$1$ has the miss rate of $\backslash (4\backslash \%\backslash )$

L$2$ access is $10$ cycles and miss rate is $\backslash (2\backslash \%\backslash )$

L$3$ access is $50$ cycles and miss rate of $\backslash (1\backslash \%\backslash )$

Main memory access takes $500$ cycles