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Problem 6: (10 points) Consider a memory system with L1 cache of 32KB and DRAM of 612 MB with the processor operation at 1 GHz. The latency to L1 is 1 cycle and the latency to DRAM is 100 cycles. In each memory cycle, the processor fetches 4 words (the size of a line of cache is 4 words). What is the peak achievable performance of the dot product of two vectors? for (i-0; i