A load capacitor of \(0.2 \mathrm{pF}\) is connected to the output of a CMOS inverter. Determine the power dissipated in the CMOS inverter for a switching frequency of \(10 \mathrm{MHz}\), for inverter parameters described in (a) Problem 16.36 and (b) Problem 16.37.

Data From Problem 16.36:-

(a) A CMOS inverter is biased at \(V_{D D}=2.5 \mathrm{~V}\). The transistor parameters are \(K_{n}=K_{p}=120 \mu \mathrm{A} / \mathrm{V}^{2}, V_{T N}=0.4 \mathrm{~V}\), and \(V_{T P}=-0.4 \mathrm{~V}\). Calculate and plot the current in the transistors as a function of the input voltage for \(0 \leq v_{I} \leq 2.5 \mathrm{~V}\).

(b) Repeat part (a) for \(V_{D D}=1.8 \mathrm{~V}\) and \(0 \leq v_{I} \leq 1.8 \mathrm{~V}\).

Data From Problem 16.37:-

The transistor parameters in the CMOS inverter are \(V_{T N}=0.35 \mathrm{~V}\), \(V_{T P}=-0.35 \mathrm{~V}, k_{n}^{\prime}=80 \mu \mathrm{A} / \mathrm{V}^{2}\), and \(k_{p}^{\prime}=40 \mu \mathrm{A} / \mathrm{V}^{2}\). Let \(V_{D D}=1.8 \mathrm{~V}\).

(a) Determine the peak current in the inverter during a switching cycle for \((W / L)_{n}=2\) and \((W / L)_{p}=4\).

(b) Repeat part (a) for \((W / L)_{n}=2\) and \((W / L)_{p}=6\).

(c) Repeat part (a) for \((W / L)_{n}=(W / L)_{p}=4\).