A CMOS inverter is biased at (V_{D D}=3.3 mathrm{~V}). The transistor threshold voltages are (V_{T N}=+0.4 mathrm{~V})
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A CMOS inverter is biased at \(V_{D D}=3.3 \mathrm{~V}\). The transistor threshold voltages are \(V_{T N}=+0.4 \mathrm{~V}\) and \(V_{T P}=-0.4 \mathrm{~V}\). Determine the peak current in the inverter and the input voltage at which it occurs for
(a) \((W / L)_{n}=3,(W / L)_{p}=\) 7.5;
(b) \((W / L)_{n}=(W / L)_{p}=4\);
(c) \((W / L)_{n}=3,(W / L)_{p}=12\).
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Related Book For
Microelectronics Circuit Analysis And Design
ISBN: 9780071289474
4th Edition
Authors: Donald A. Neamen
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