Consider the common-gate amplifier shown in Figure 4.35. The power supply voltages are \(\pm 5 \mathrm{~V}\), the output resistance of the signal source is \(500 \Omega\), and the input resistance of the amplifier is to be \(200 \Omega\). The transistor parameters are \(k_{p}^{\prime}=40 \mu \mathrm{A} / \mathrm{V}^{2}, V_{T P}=-0.6 \mathrm{~V}\), and \(\lambda=0\). The output load resistance is \(R_{L}=10 \mathrm{k} \Omega\). Design the circuit such that the output voltage has a peakto-peak symmetrical swing of at least \(4 \mathrm{~V}\).

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R CCI + Rs www RG V+ HH CC2 ww CG RD V w RL Figure 4.35 Figure for Exercise Ex 4.10