Consider the output stage in Figure P13.16 with parameters \(V^{+}=5 \mathrm{~V}\), \(V^{-}=-5 \mathrm{~V}, R_{L}=10 \mathrm{k} \Omega\), and \(I_{\text {Bias }}=80 \mu \mathrm{A}\). Assume the diode parameters are \(I_{S D}=5 \times 10^{-15} \mathrm{~A}\), and assume the transistor parameters are \(I_{S Q}=\) \(8 \times 10^{-15} \mathrm{~A}\) and \(\beta_{n}=\beta_{p}=120\).

(a) For \(v_{I}=0\), determine \(V_{B B}, I_{C N}\), and \(I_{C P}\).

(b) For \(v_{I}=3 \mathrm{~V}\), determine \(v_{O}, i_{L}, V_{B B}, I_{C N}\), and \(I_{C P}\).

Transcribed Image Text:

"Bias V+ D D + VBB QN Bias V- Figure P13.16 RL QP