Design ECL series gating logic circuits, similar to the one shown in Figure 17.16, that will implement the logic functions

(a) \(Y=[A \cdot(B+C)+D]\) and

(b) \(Y=[A \cdot B+C \cdot D]\).

Transcribed Image Text:

Ao Vcc = 2.5 V 201 Vcc=2.5 V Bo Q02 Vcc=2.5 V Vcc = 2.5 V QR OVRI = 2.3 V Co 203 20VR2=1.6 V Figure 17.16 ECL series gating example lo