In the circuit in Figure P17.13, the input voltages \(v_{X}\) and \(v_{Y}\) are compatible with the output voltages \(v_{O 1}\) and \(v_{O 2}\). Neglect base currents.

(a) Design an appropriate value of \(V_{R}\). State the reason for your selection.

(b) Determine the value of \(R_{C 1}\) such that, when \(Q_{1}\) is on, the current in \(R_{C 1}\) is one-half that in \(D_{1}\).

(c) Determine the value of \(R_{C 2}\) such that, when \(Q_{2}\) is on, the current in \(R_{C 2}\) is one-half that in \(D_{2}\).

(d) Calculate the power dissipated in the circuit when \(v_{X}=v_{Y}=\operatorname{logic} 0\).

Transcribed Image Text:

Figure P17.13 UX QY Qx D R = 8 k ww www www Vcc = 3.5 V RCI RC2 RE = 12 ks www -OVR D 0102