The bias voltages of the circuit shown in Figure P7.67 are changed to (V^{+}=3 mathrm{~V}) and (V^{-}=-3

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The bias voltages of the circuit shown in Figure P7.67 are changed to \(V^{+}=3 \mathrm{~V}\) and \(V^{-}=-3 \mathrm{~V}\). The input resistances are \(R_{i}=4 \mathrm{k} \Omega\) and \(R_{G}=200 \mathrm{k} \Omega\). The transistor parameters are \(K_{p}=0.5 \mathrm{~mA} / \mathrm{V}^{2}, V_{T P}=\) \(-0.5 \mathrm{~V}, \lambda=0, C_{g s}=0.8 \mathrm{pF}\), and \(C_{g d}=0.08 \mathrm{pF}\).

(a) Design the circuit such that \(I_{D Q}=0.5 \mathrm{~mA}\) and \(V_{S D Q}=2 \mathrm{~V}\).

(b) Find the midband voltage gain.

(c) Determine the equivalent Miller capacitance.

(d) Find the upper \(3 \mathrm{~dB}\) frequency.

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