The quiescent power dissipation in the circuit in Figure P4.35 is to be limited to \(2.5 \mathrm{~mW}\). The parameters of the transistor are \(V_{T N}=0.6 \mathrm{~V}\), \(k_{n}^{\prime}=100 \mu \mathrm{A} / \mathrm{V}^{2}\), and \(\lambda=0.02 \mathrm{~V}^{-1}\).

(a) Determine \(I_{Q}\).

(b) Determine \(W / L\) such that the output resistance is \(R_{o}=0.5 \mathrm{k} \Omega\).

(c) Using the results of parts (a) and (b), determine the small-signal voltage gain.

(d) Determine the output resistance if the transistor width-to-length ratio is \(W / L=100\).

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VDD = 2.5 V Figure P4.35 Ro