The value of \(I_{\text {Bias }}\) in the circuit shown in Figure 8.31 is \(0.5 \mathrm{~mA}\). Assume diode and transistor parameters of \(I_{S D 1}=10^{-16} \mathrm{~A}, I_{S D 2}=4 \times 10^{-16} \mathrm{~A}\), \(I_{S Q_{n}}=8 \times 10^{-16} \mathrm{~A}\), and \(I_{S Q_{p}}=1.6 \times 10^{-15} \mathrm{~A}\). For \(v_{O}=0\) and neglecting base currents, determine (a) \(V_{B B}\), (b) \(v_{B E n}\) and \(v_{E B p}\), (c) the quiescent collector currents, and (d) the required value of \(v_{I}\).

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V+ Bias iBn iCn Qn DIS VBB D2V RL Qp 'Bp icp Figure 8.31