The switched snooping protocol of Figure 4.40 assumes that memory "knows" whether a processor node is in state Modified and thus will respond with data. Real systems implement this in one of two ways. The first way uses a shared "Owned" signal. Processors assert Owned if an "Other GetS" or "Other GetM" event finds the block in state M. A special network ORs the individual Owned signals together; if any processor asserts Owned, the memory controller ignores the request. Note that in a nonpipelined interconnect, this special network is trivial (i.e., it is an OR gate).
However, this network becomes much more complicated with high-performance pipelined interconnects. The second alternative adds a simple directory to the memory controller (e.g., 1 or 2 bits) that tracks whether the memory controller is responsible for responding with data or whether a processor node is responsible for doing so.
a. Use a table to specify the memory controller protocol needed to implement the second alternative. For this problem, ignore the PUTM message that gets sent on a cache replacement.
b. Explain what the memory controller must do to support the following sequence, assuming the initial cache contents of Figure 4.37:
P1: read 110
P15: read 110