Draw the hardware structures that will be inferred by typical synthesizers from the code excerpts that follow.
Question:
Draw the hardware structures that will be inferred by typical synthesizers from the code excerpts that follow. A, B, and E are 4-bit vectors, and C and D are 2-bit numbers; clock is a 1-bit signal. Draw the structure and mark the inputs and outputs.
(a) always @(clock)
begin
A <= {A[3], A[3:1]};
B <= {A[0], B[3:1]};
end
(b) always @(C)
begin
case(C)
0: D = 2’b11;
1: D = 2’b10;
2: D = 2’b00;
default: begin
end
endcase
end
(c) always @(C)
begin
case(C)
0: E = A + B;
1: E = A >>> 2;
2: E = A – B;
3: E = A;
endcase
end
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Related Book For
Digital Systems Design Using Verilog
ISBN: 978-1285051079
1st edition
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
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