In Section 4.10 we developed an algorithm for multiplying signed binary fractions, with negative fractions represented in 2’s complement.
(a) Illustrate this algorithm by multiplying 1.0111 by 1.101.
(b) Draw a block diagram of the hardware necessary to implement this algorithm for the case where the multiplier is 4 bits, including sign, and the multiplicand is 5 bits, including sign.