A generic DMA controller consists of the following components:

° Address generator 

° Address bus interface 

° Data bus interface 

° Bus requestor Interrupt signal circuits 

° Local peripheral controller 

The local peripheral controller is the circuitry that the DMA uses to select among the peripherals connected to it. This circuit is activated right after the bus is requested. What is the purpose of each of the other components listed above, and when are they active? (Use Figure 7.6 as a guide.)  

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CPU H Start Request I/O transfer Send addresses of source and destination and number of bytes to transfer Other activities Acknowledge Finish Acknowledge DMA Request bus Bus free? Yes i Steal cycle i 1 Activate address lines Place block of bytes on bus data lines Release bus No Yes Total data bytes transferred = total requested? Notify CPU of completion No FIGURE 7.6 Swimlane Diagram Showing the Interaction of a CPU and a DMA