Design: (a) A 16-bit adder whose worst-case add-time is 10 using a 4-bit CLA as a building

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Design: 

(a) A 16-bit adder whose worst-case add-time is 10Δ using a 4-bit CLA as a building block.
(b) The fastest 64-bit adder using a 4-bit CLA as the building block. Estimate the worst-case add-time of your design.
(c) A combinational circuit to compute the function where (3/8)x is a 4-bit 2’s complement number.

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