146 Failure times of silicon wafer microchips. Refer to the National Semiconductor study of manufactured silicon wafer integrated circuit chips, Exercise 72. Recall that the failure times of the microchips (in hours) were determined at different solder temperatures (degrees Centigrade). The data are repeated in the table below and saved in the WAFER file.

a. Fit the straight-line model E(y) = b0 + b1x to the data, where y = failure time and x = solder temperature .

b. Compute the residual for a microchip manufactured at a temperature of 152°C.

c. Plot the residuals against solder temperature ( x ). Do you detect a trend?

d. In Exercise 72c, you determined that failure time ( y )

and solder temperature ( x ) were curvilinearly related.

Does the residual plot, part c , support this conclusion?

Transcribed Image Text:

Temperature (C) 165 Time to Failure (hours) 200 162 200 164 1,200 158 500 158 600 159 750 156 1,200 157 1,500 152 500 147 500 149 1,100 149 1,150 142 3,500 142 3,600 143 3,650 133 4,200 132 4,800 132 5,000 134 5,200 134 5,400 125 8,300 123 9,700 Based on Gee, S., and Nguyen, L. "Mean time to failure in wafer level- CSP packages with SnPb and SnAgCu solder bmps." International Wafer Level Packaging Conference, San Jose, CA, Nov. 3-4, 2005 (adapted from Figure 7).