Design an ALU that performs the following operations:

Give the result of your design as the logic diagram for a single stage of the ALU. Your design should have one carry line to the left and one carry line to the right between stages and three selection bits. If you have access to logic optimization software, apply it to the design to obtain reduced logic. Model your ALU in an HDL and verify its operation by simulation.

Transcribed Image Text:

A + B A + B + 1 B B + 1 sr A AV B sl A