1. [50 pts total] Answer all parts A through J, inclusive, below. I have defined a new computer program to be used as a benchmark for performance measurements. It's called the "ERAU Run". It contains the mix of instructions in the table, below (the numbers are not at all intended to be real world - this is a torture for undergraduates, the numbers don't have to be sensible :-) The table also shows the cycles per instruction and reflects the fact that our hardware includes a floating point co-processor. Instruction Cycles Required Per Instruction ERAU Run Instruction Count Floating point multiply or divide 7,000,000 Floating point add or subtract 12 2,000,000 All others (non floating point) 5 10,000,000 The gas compiler we use is intended for use on many different machines; some with floating point Co-processors, some without; so the user can, via compile time option, request that the code be compiled for a floating point architecture or a non-floating point architecture - in which case the compiler must translate each floating point instruction into a set of equivalent integer instructions that run on the main CPU only. Assuming that our hardware is clocked at 100MHz: A. [3 pts) What is the average CPI for the FP version of the ERAU Run? B. [3 pts) How long will it take to execute this FP version of ERAU Run on our (pretty slow) hardware? C. [3 pts) What is the MIPS rate for our hardware with the FP co-processor