4.4 Problems in this exercise assume that logic blocks needed to implement a processors datapath have the following latencies:

D-Mem 250ps, I-Mem 200ps, ALU/Regs 90ps, Add 70ps, Mux 20ps, Sign-Extend 15ps, Shift-Left-2 10ps.

4.4.1 If the only thing we need to do in a processor is fetch consecutive instructions (Figure 4.6: fetch.4.6.png), what would the cycle time (ps) be? ps. Hints: I-Mem takes longer than the Add unit, so the clock cycle time is equal to ?the latency of the I-Mem.?

4.4.2 Consider a datapath similar to the one in Figure 4.11 (see the attached shift.left.2.png , but for a processor that only has one type of instruction: unconditional PC-relative branch. What would the cycle time (ps) be for this datapath? ps

Hints: The critical path (in ORANGE) for this instruction is through the I-Mem, Sign-extend and Shift-left-2 to get the offset, Add unit to compute the new PC, and Mux to select that value instead of PC+4. Note that the path (in BLUE) through the PC Add unit is shorter, because the latency of I-Mem is longer than the latency of the Add unit.

4.4.3 Repeat 4.4.2, but this time we need to support only conditional PC-relative branches. Hints: Conditional branches have the same long-latency path that computes the branch address as unconditional branches do. Additionally, they have a onger path (in RED) that goes through Registers, Mux, and ALU to compute the PCSrc condition. This critical path (inRED) is the longer of the two, and the latencies are ps.

The remaining three problems in this exercise refer to the datapath element Shift- left-2:

4.4.4 Which kinds of instructions require this resource? Choose 1,2,3 or 4 from below.

1. PC-relative branches 2. J-Type instructions 3. All I-Type instructions, 4. All R-type instructions

4.4.5 Is Shift- left-2 on the critical path of PC-relative branches, either contitional or unconditonal (Y/N)?

4.4.6 Assuming that we only support beq, discuss how changes in the given latency of this resource affect the cycle time of the processor. That is, what latency (in ps) does the Shift- left-2 unit need to be so that ORANGE path become critical (with the longest delay.) Assume that the latencies of other resources do not change. ps