6. (20 points) Consider the following Finite State Machine: so 1/0 S3 1/0 0/0 0/1 1/0 S1 1/0 S2 0/0 00 Start State: SO Inputs are listed before the slash on each transistion arc Outputs are listed after the slash on each transistion arc 6a. Give the truth table for the above Finite State Machine. Encode the states using 2 bit binary values: S0 => 00, S1 => 0 1, S2 => 10, S3 => 11 6b. Design a circuit with equivalent behavior. Use 2 D-flipflops for the memory (which can be shown like the "State Register" in Q. 5). You may use decoders, multiplexors, and/or other gates.