Answer please

(a) [C (3M The initial content of a 16-bit shift register is (DDDD)16. The content of shift register is shifted three times to the left with the serial input being the sequence: (010)2 (assume MSB bit will be first input bit). Investigate and write the contents (in HEX) of the register after each shift operation in the format given in Table 1. Table 1 Time Content of Shift register (in HEX form) Initially After 1st shift operation After 2nd shift operation After 3rd shift operation [C (3M (b) A 4-bit ripple counter uses positive edge triggered JK flip-flops. If the propagation delay of each flip flop is 35 ns- (i) Calculate the total propagation delay of the counter? (ii) Calculate the maximum clock frequency that can be used in the counter? Page 12 (c) Write the value of preset and clear input for Normal operation of negative edge triggered JK flip-flop with active high preset and active low clear input. Write Justification. [C (2M (a) [C (3M The initial content of a 16-bit shift register is (DDDD)16. The content of shift register is shifted three times to the left with the serial input being the sequence: (010)2 (assume MSB bit will be first input bit). Investigate and write the contents (in HEX) of the register after each shift operation in the format given in Table 1. Table 1 Time Content of Shift register (in HEX form) Initially After 1st shift operation After 2nd shift operation After 3rd shift operation [C (3M (b) A 4-bit ripple counter uses positive edge triggered JK flip-flops. If the propagation delay of each flip flop is 35 ns- (i) Calculate the total propagation delay of the counter? (ii) Calculate the maximum clock frequency that can be used in the counter? Page 12 (c) Write the value of preset and clear input for Normal operation of negative edge triggered JK flip-flop with active high preset and active low clear input. Write Justification. [C (2M