Question
Consider the hypothetical machine: Instruction Format: 16 bits (bits 0 to 3 for the opcode; 4 to 15 for the address). Integer format: 2s complement
Consider the hypothetical machine: Instruction Format: 16 bits (bits 0 to 3 for the opcode; 4 to 15 for the address). Integer format: 2s complement on 16 bits. Partial list of opcodes: 0001 Load AC from memory 0010 Store AC to memory 0100 Add AC and R1, result will be in AC 0101 Add to AC from memory address 0111 Load register R1 from memory 0110 Load AC from I/O 1000 Store AC to I/O 1001 Move R1 to AC Consider that the memory address (7A9) H has the contents 16 in decimal represented in 2s complement; memory address (7AA)H has contents (-11) in decimal represented in 2s and the program starts at address (B2F)H. The address is word addressable (1 word = 16 bits). Consider the following program: Load R1 from memory address 7A9H : Move R1 to AC Load R1 from memory address 7AAH Add AC and R1 Store AC to address 7ABH
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