Ex. Suppose that the following instructions are found at memory locations 31 and 32. Suppose that the following data are found at memory 45 and 46.

Address Instruction

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16 LDA 32

17 SUB 33 Addresses 16-17 represent the program area

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Data

32 25 Addresses 32-33 represent the data area

33 18

Show the contents of the PC, MAR, MDR, IR, and A registers as each step of the fetch-execute cycle is performed for instructions at addresses 16 and 17. Note that you have a sequence of two instructions. The 5 steps in the second instruction SUB 33 will gradually replace the contents of the registers set by the first instruction.

Instruction: 16 LDA 32 PC MAR MDR IR A 16 16 LDA 32 ? ? Steps in the machine cycle 1. PC MAR 2. MDR IR 3. IR[addr) MAR 4. MDRA 5. PC + 1 PC Instruction: 17 SUB 33 PC MAR MDR IR A . Steps in the machine cycle 1. PC MAR 2. MDR IR 3. IR[addr] MAR 4. A-MDR A 5. PC +1 PC Instruction: 16 LDA 32 PC MAR MDR IR A 16 16 LDA 32 ? ? Steps in the machine cycle 1. PC MAR 2. MDR IR 3. IR[addr) MAR 4. MDRA 5. PC + 1 PC Instruction: 17 SUB 33 PC MAR MDR IR A . Steps in the machine cycle 1. PC MAR 2. MDR IR 3. IR[addr] MAR 4. A-MDR A 5. PC +1 PC