In class, we saw $($briefly$)$ a half$-$adder circuit that takes as input A and $B$ and has as output Sum and carry$-$out

$($Cout$).$ We can combine two half$-$adders and an OR gate to create a full$-$adder $($below$).$ The important

difference is that the full$-$adder considers a carry$-$in bit $($Cin$),$ which allows us to connect adders in series.

For the full adder:

a$.$ Analyze this to create a logic truth table for inputs A$,$ B$,$ Cin and outputs Sum and Cout.

b$.$ Design and sketch a full adder using only NOR, NAND, and NOT $($inverter$)$ gates. As a starting point,

recall from Lab #$2$ that we can create an XOR gate using only NAND gates.

$Cc$

b$.$ Find $S[3$:$0]$ and Cout for the following inputs:

ii$.A[3$:$0]=1000,B[3$:$0]=0111$

iii. $A[3$:$0]=0000,B[3$:$0]=1111$

iv$.A[3$:$0]=0001,B[3$:$0]=1111$

v$.A[3$:$0]=1111,B[3$:$0]=1111$