Match the given terms (each term used once) with the descriptions. 8-bit DI 16-bit logical SP SI linear BP 8086 6-bytes paging 8088 4-bytes physical 1 M-Byte IP segmentation 64 T-Bytes 16 M-Byte ___ length of 8086 instruction pre-fetch queue ___ width of 8088 external data bus ___ size of virtual memory (Pentium processors) ___ points to next instruction to be executed ____ address produced by the segmentation system ___ Processor used primarily in IBM PCs ___ used to point to locations inside the stack ___ address type produced by the application (task) ___ addressable RAM size in the 8086 and 8088 ___ offset register used as destination in string moves ___ processor used primarily in PC clones ___ mechanism used to map the linear address onto the entire virtual memory space ___ width of 8086 external data bus ___ defines segments through descriptors, converts logical address to linear address ___ 80286 addressable RAM capability ___ points to the "top" of the stack ___ length of 8088 instruction pre-fetch queue ___ produced by the paging system, address type used to specify the hardware address ___offset register used as source in string moves