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Problem 3 (Design for Power, Chapter 1) The Intel Pentium 4 Prescott processors, released in 2004, had a clock rate of 3.6 GHz and voltage
Problem 3 (Design for Power, Chapter 1) The Intel Pentium 4 Prescott processors, released in 2004, had a clock rate of 3.6 GHz and voltage of 1.25V. Assume that, on average, it consumed 10W of static power (caused by the leakage current) and 90W of dynamic power. The Intel Core i5 Ivy Bridge, released in 2012, had a clock rate of 3.4 GHz and voltage of 0.9V. Assume that, on average, it consumed 30W of static power and 40W of dynamic power. A. For each processor, find the average capacitive load. B. If the total dissipated power (i.e. static + dynamic) is to be reduced by 10%, how much should the voltage be reduced to maintain the same leakage current? Note: power is defined as the product of voltage and current, and the leakage current contributes to the static power
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