Which of the following statements best describes metastability?

A$.$ A condition in a flip$-$flop that arises when the reset input changes too frequently

B$.$ A condition in a logic gate that arises when two separate inputs arrive at slightly different times

C$.$ A condition in a flip flop that can arise when the data input changes coincidentally with the clock input changing

D$.$ A condition in a logic gate that can arise when the output is connected to the output of another logic gate

E$.$ A condition in a flip flop that can arise on the negative edge of the clock input $($assuming that it is positive$-$edge triggered$)$