(a) Design the circuit in Figure P3.42 such that (I_{D Q}=0.25 mathrm{~mA}) and (V_{D}=-2 mathrm{~V}). The nominal...

Question:

(a) Design the circuit in Figure P3.42 such that $I_{D Q}=0.25 \mathrm{~mA}$ and $V_{D}=-2 \mathrm{~V}$. The nominal transistor parameters are $V_{T P}=-1.2 \mathrm{~V}, k_{p}^{\prime}=$ $35 \mu \mathrm{A} / \mathrm{V}^{2}$, and $W / L=15$. Sketch the load line and plot the $Q$-point.

(b) Determine the maximum and minimum $Q$-point values if the tolerance of the $k_{p}^{\prime}$ parameter is $\pm 5$ percent.

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