Assume that an NMOS address decoder can source \(250 \mu \mathrm{A}\) when the output goes high. If the effective capacitance of each memory cell is \(C_{L}=0.8 \mathrm{pF}\) and the effective capacitance of the address line is \(C_{L A}=5 \mathrm{pF}\), determine the rise time of the address line voltage if \(V_{I H}=2.7 \mathrm{~V}\).