Redesign the two-stage amplifier in Figure 6.66 such that the voltage gain of each stage is \(A_{v 1}=A_{v 2}=-50\). Assume transistor current gains of \(\beta_{\text {npn }}=150\) and \(\beta_{\text {pnp }}=110\). The total power dissipated in the circuit should be limited to \(25 \mathrm{~mW}\).

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Rs = 0.5 k ww CC1 HH ww V+ = +5 V R = 100 ww ww RCI=5kQ ww RE = 2 k 22 CE2 CC2 Ro R = 50 REI= 2 CEI Figure 6.66 V-=-5 V www Rc2= 1.5 www RL= 5